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LumaOps release export
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/*---------------------------------------------------------*\
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| KingstonFuryDRAMControllerDetect.cpp |
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| Detection of Kingston Fury DDR4/5 RAM modules |
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| Geofrey Mon (geofbot) 14 Jul 2024 |
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| Milan Cermak (krysmanta) |
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| This file is part of the OpenRGB project |
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| SPDX-License-Identifier: GPL-2.0-or-later |
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\*---------------------------------------------------------*/
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#include <vector>
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#include "Detector.h"
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#include "KingstonFuryDRAMController.h"
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#include "LogManager.h"
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#include "RGBController_KingstonFuryDRAM.h"
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#include "i2c_smbus.h"
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#include "pci_ids.h"
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using namespace std::chrono_literals;
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typedef enum
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{
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RESULT_PASS = 0,
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RESULT_FAIL = 1,
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RESULT_ERROR = 2
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} TestResult;
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bool TestDDR4Models(char code)
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{
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return (code == FURY_MODEL_BEAST_WHITE_DDR4 ||
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code == FURY_MODEL_BEAST_DDR4);
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}
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bool TestDDR5Models(char code)
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{
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return (code == FURY_MODEL_BEAST_DDR5 ||
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code == FURY_MODEL_BEAST2_DDR5 ||
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code == FURY_MODEL_RENEGADE_DDR5 ||
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code == FURY_MODEL_BEAST_RGB_WHITE_DDR5);
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}
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// Checking Fury signature in the RGB address space
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TestResult TestForFurySignature(i2c_smbus_interface *bus, unsigned int slot_addr, bool (*modelChecker)(char))
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{
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bool passed = true;
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char test_str[] = "FURY";
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int res;
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LOG_DEBUG("[%s] looking at 0x%02X",
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FURY_CONTROLLER_NAME, slot_addr);
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// Start transaction
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res = bus->i2c_smbus_write_byte_data(slot_addr, FURY_REG_APPLY, FURY_BEGIN_TRNSFER);
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if(res < 0)
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{
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LOG_DEBUG("[%s] DIMM not present at 0x%02X",
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FURY_CONTROLLER_NAME, slot_addr);
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return RESULT_ERROR;
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}
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std::this_thread::sleep_for(FURY_DELAY);
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LOG_DEBUG("[%s] %02X beginning transaction; res=%02X",
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FURY_CONTROLLER_NAME, slot_addr, res);
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// Read and check the signature
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for(int i = 1; i <= 4; i++)
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{
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for(int retry = 3; retry > 0; retry--)
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{
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res = bus->i2c_smbus_read_word_data(slot_addr, i);
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std::this_thread::sleep_for(FURY_DELAY);
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LOG_DEBUG("[%s] Testing address %02X register %02X, res=%04X",
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FURY_CONTROLLER_NAME, slot_addr, i, res);
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// retry when there is an error or the returned value is 0xFFFF
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if((res >= 0) && (res < 0xFFFF))
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{
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break;
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}
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}
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if(res < 0)
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{
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return RESULT_ERROR;
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}
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char shifted = (res >> 8) & 0xFF;
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if(shifted != test_str[i-1])
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{
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passed = false;
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break;
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}
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}
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if(passed)
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{
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// Get the model code
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res = bus->i2c_smbus_read_word_data(slot_addr, FURY_REG_MODEL);
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int model_code = res >> 8;
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std::this_thread::sleep_for(FURY_DELAY);
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LOG_DEBUG("[%s] Reading model code at address %02X register %02X, res=%02X",
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FURY_CONTROLLER_NAME, slot_addr, FURY_REG_MODEL, res);
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if(!modelChecker(model_code))
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{
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LOG_INFO("[%s] Unknown model code 0x%02X", FURY_CONTROLLER_NAME, model_code);
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passed = false;
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}
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}
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// Close transaction
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res = bus->i2c_smbus_write_byte_data(slot_addr, FURY_REG_APPLY, FURY_END_TRNSFER);
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if(res < 0)
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{
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return RESULT_ERROR;
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}
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std::this_thread::sleep_for(FURY_DELAY);
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LOG_DEBUG("[%s] %02X ending transaction; res=%02X",
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FURY_CONTROLLER_NAME, slot_addr, res);
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return passed ? RESULT_PASS : RESULT_FAIL;
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}
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void DetectKingstonFuryDRAMControllers(i2c_smbus_interface* bus, std::vector<SPDWrapper*> &slots,
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uint8_t fury_base_addr, bool (*modelChecker)(char), std::vector<int> &fury_slots)
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{
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// Are these the Kingston Fury DRAMs
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for(SPDWrapper *slot : slots)
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{
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TestResult result;
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int retries = 0;
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result = RESULT_ERROR;
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while(retries < 3 && result == RESULT_ERROR)
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{
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result = TestForFurySignature(bus, fury_base_addr + slot->index(), modelChecker);
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if(result == RESULT_PASS)
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{
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break;
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}
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if(result == RESULT_ERROR)
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{
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// I/O error - wait for a bit and retry
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retries++;
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std::this_thread::sleep_for(FURY_DELAY);
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}
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}
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// RAM module successfully detected in the slot 'slot_index'
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if(result == RESULT_PASS)
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{
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LOG_DEBUG("[%s] detected at slot index %d",
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FURY_CONTROLLER_NAME, slot->index());
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fury_slots.push_back(slot->index());
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}
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}
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}
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/******************************************************************************************\
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* *
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* DetectKingstonFuryDRAMControllers *
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* *
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* Detect Kingston Fury DDR4/5 DRAM controllers on the enumerated I2C busses. *
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* *
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\******************************************************************************************/
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void DetectKingstonFuryDDR4Controllers(i2c_smbus_interface* bus, std::vector<SPDWrapper*> &slots, const std::string &name)
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{
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std::vector<int> fury_slots;
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DetectKingstonFuryDRAMControllers(bus, slots, FURY_BASE_ADDR_DDR4, TestDDR4Models, fury_slots);
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if(!fury_slots.empty())
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{
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KingstonFuryDRAMController* controller = new KingstonFuryDRAMController(bus, FURY_BASE_ADDR_DDR4, fury_slots, name);
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RGBController_KingstonFuryDRAM* rgb_controller = new RGBController_KingstonFuryDRAM(controller);
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ResourceManager::get()->RegisterRGBController(rgb_controller);
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}
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}
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void DetectKingstonFuryDDR5Controllers(i2c_smbus_interface* bus, std::vector<SPDWrapper*> &slots, const std::string &name)
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{
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std::vector<int> fury_slots;
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DetectKingstonFuryDRAMControllers(bus, slots, FURY_BASE_ADDR_DDR5, TestDDR5Models, fury_slots);
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if(!fury_slots.empty())
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{
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KingstonFuryDRAMController* controller = new KingstonFuryDRAMController(bus, FURY_BASE_ADDR_DDR5, fury_slots, name);
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RGBController_KingstonFuryDRAM* rgb_controller = new RGBController_KingstonFuryDRAM(controller);
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ResourceManager::get()->RegisterRGBController(rgb_controller);
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}
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}
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REGISTER_I2C_DIMM_DETECTOR("Kingston Fury DDR4 DRAM", DetectKingstonFuryDDR4Controllers, JEDEC_KINGSTON, SPD_DDR4_SDRAM);
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REGISTER_I2C_DIMM_DETECTOR("Kingston Fury DDR4 DRAM", DetectKingstonFuryDDR4Controllers, JEDEC_KINGSTON_2, SPD_DDR4_SDRAM);
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REGISTER_I2C_DIMM_DETECTOR("Kingston Fury DDR5 DRAM", DetectKingstonFuryDDR5Controllers, JEDEC_KINGSTON, SPD_DDR5_SDRAM);
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REGISTER_I2C_DIMM_DETECTOR("Kingston Fury DDR5 DRAM", DetectKingstonFuryDDR5Controllers, JEDEC_KINGSTON_2, SPD_DDR5_SDRAM);
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REGISTER_I2C_DIMM_DETECTOR("Kingston Fury DDR5 DRAM", DetectKingstonFuryDDR5Controllers, JEDEC_KINGSTON_3, SPD_DDR5_SDRAM);
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